Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos

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TWR-S12GN32-KIT

Port Integration Module (S12GPIMV1)

MC9S12G Family Reference Manual, Rev.1.23

Freescale Semiconductor

177

2.3.9

Pins PM3-0

2.3.10

Pins PP7-0

Table 2-13. Port

Pins PM3-0

PM3

• 64/100 LQFP: The SCI2 TXD signal is mapped to this pin when used with the SCI function. If the SCI2

TXD signal is enabled the I/O state will depend on the SCI2 configuration.

• Signal priority:

64/100 LQFP: TXD2 > GPO

PM2

• 64/100 LQFP: The SCI2 RXD signal is mapped to this pin when used with the SCI function. If the SCI2

RXD signal is enabled the I/O state will be forced to be input.

• Signal priority:

64/100 LQFP: RXD2 > GPO

PM1

• Except 20 TSSOP: The TXCAN signal is mapped to this pin when used with the CAN function. The

enabled CAN forces the I/O state to be an output.

• 32 LQFP: The SCI1 TXD signal is mapped to this pin when used with the SCI function. If the SCI1 TXD

signal is enabled the I/O state will depend on the SCI1 configuration.

• 48 LQFP: The SCI2 TXD signal is mapped to this pin when used with the SCI function. If the SCI2 TXD

signal is enabled the I/O state will depend on the SCI2 configuration.

• Signal priority:

32 LQFP: TXCAN > TXD1 > GPO
48 LQFP: TXCAN > TXD2 > GPO
64/100 LQFP: TXCAN > GPO

PM0

• Except 20 TSSOP: The RXCAN signal is mapped to this pin when used with the CAN function. The

enabled CAN forces the I/O state to be an input. If CAN is active the selection of a pulldown device on
the RXCAN input has no effect.

• 32 LQFP: The SCI1 RXD signal is mapped to this pin when used with the SCI function. The enabled

SCI1 RXD signal forces the I/O state to an input.

• 48 LQFP: The SCI2 RXD signal is mapped to this pin when used with the SCI function. The enabled

SCI2 RXD signal forces the I/O state to an input.

• Signal priority:

32 LQFP: RXCAN > RXD1 > GPO
48 LQFP: RXCAN > RXD2 > GPO
64/100 LQFP: RXCAN > GPO

Table 2-14. Port

Pins PP7-0

PP7-PP6

• 64/100 LQFP: The PWM channels 7 and 6 signal are mapped to these pins when used with the PWM

function. The enabled PWM channel forces the I/O state to be an output.

• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:

64/100 LQFP: PWM > GPO

PP5-PP4

• 48/64/100 LQFP: The PWM channels 5 and 4 signal are mapped to these pins when used with the

PWM function. The enabled PWM channel forces the I/O state to be an output.

• 48/64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:

48/64/100 LQFP: PWM > GPO