Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos
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TWR-S12GN32-KIT
Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual,
Rev.1.23
220
Freescale Semiconductor
2.4.3.23
Port S Pull Device Enable Register (PERS)
2.4.3.24
Port S Polarity Select Register (PPSS)
Table 2-42. DDRS Register Field Descriptions
Field
Description
7-0
DDRS
Port S data direction—
This bit determines whether the associated pin is a general-purpose input or output.
This bit determines whether the associated pin is a general-purpose input or output.
1 Associated pin configured as output
0 Associated pin configured as input
0 Associated pin configured as input
Address 0x024C
Access: User read/write
1
1
Read: Anytime
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PERS7
PERS6
PERS5
PERS4
PERS3
PERS2
PERS1
PERS0
W
Reset
1
1
1
1
1
1
1
1
Figure 2-24. Port S Pull Device Enable Register (PERS)
Table 2-43. PERS Register Field Descriptions
Field
Description
7-0
PERS
Port S pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If a pin is used as output this bit has only effect if used in wired-or mode with a pullup
device.
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If a pin is used as output this bit has only effect if used in wired-or mode with a pullup
device.
1 Pull device enabled
0 Pull device disabled
0 Pull device disabled
Address 0x024D
Access: User read/write
1
1
Read: Anytime
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PPSS7
PPSS6
PPSS5
PPSS4
PPSS3
PPSS2
PPSS1
PPSS0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-25. Port S Polarity Select Register (PPSS)