Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos
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TWR-S12GN32-KIT
Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
231
2.4.3.38
Port P Polarity Select Register (PPSP)
Table 2-64. PERP Register Field Descriptions
Field
Description
7-0
PERP
Port P pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
0 Pull device disabled
Address 0x025D (
Access: User read/write
1
1
Read: Anytime
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PPSP7
PPSP6
PPSP5
PPSP4
PPSP3
PPSP2
PPSP1
PPSP0
W
Reset
0
0
0
0
0
0
0
0
Address 0x025D (
Access: User read/write
7
6
5
4
3
2
1
0
R
0
0
PPSP5
PPSP4
PPSP3
PPSP2
PPSP1
PPSP0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-39. Port P Polarity Select Register (PPSP)
Table 2-65. PPSP Register Field Descriptions
Field
Description
7-0
PPSP
Port P pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 Pulldown device selected; rising edge selected
0 Pullup device selected; falling edge selected
0 Pullup device selected; falling edge selected