Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos
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TWR-S12GN32-KIT
Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
237
2.4.3.46
Port J Polarity Select Register (PPSJ)
2.4.3.47
Port J Interrupt Enable Register (PIEJ)
Read: Anytime
Address 0x026D (
Access: User read/write
1
1
Read: Anytime
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PPSJ7
PPSJ6
PPSJ5
PPSJ4
PPSJ3
PPSJ2
PPSJ1
PPSJ0
W
Reset
0
0
0
0
0
0
0
0
Address 0x026D (
Access: User read/write
7
6
5
4
3
2
1
0
R
0
0
0
0
PPSJ3
PPSJ2
PPSJ1
PPSJ0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-46. Port J Polarity Select Register (PPSJ)
Table 2-72. PPSJ Register Field Descriptions
Field
Description
7-0
PPSJ
Port J pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 Pulldown device selected; rising edge selected
0 Pullup device selected; falling edge selected
0 Pullup device selected; falling edge selected
Address 0x026E (
)
Access: User read/write
1
7
6
5
4
3
2
1
0
R
PIEJ7
PIEJ6
PIEJ5
PIEJ4
PIEJ3
PIEJ2
PIEJ1
PIEJ0
W
Reset
0
0
0
0
0
0
0
0
Address 0x026E (
Access: User read/write
7
6
5
4
3
2
1
0
R
0
0
0
0
PIEJ3
PIEJ2
PIEJ1
PIEJ0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-47. Port J Interrupt Enable Register (PIEJ)