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Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos

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TWR-S12GN32-KIT
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Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual,
Rev.1.23
248
Freescale Semiconductor
2.4.3.64
Port AD Interrupt Flag Register (PIF1AD)
 Address 0x027F
Access: User read/write
1
1
Read: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PIF1AD7
PIF1AD6
PIF1AD5
PIF1AD4
PIF1AD3
PIF1AD2
PIF1AD1
PIF1AD0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-63. Port AD Interrupt Flag Register (PIF1AD)
Table 2-90. PIF1AD Register Field Descriptions
Field
Description
7-0
PIF1AD
Port AD interrupt flag—
This flag asserts after a valid active edge was detected on the related pin (see
”). This can be a rising or a falling edge based on the state of the polarity select register. An interrupt will
occur if the associated interrupt enable bit is set.
Writing a logic “1” to the corresponding bit field clears the flag.
1 Active edge on the associated bit has occurred
0 No active edge occurred