Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos
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TWR-S12GN32-KIT
Background Debug Module (S12SBDMV1)
MC9S12G Family Reference Manual,
Rev.1.23
292
Freescale Semiconductor
7.3.2
Register Descriptions
A summary of the registers associated with the BDM is shown in
. Registers are accessed by
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Table 7-2. BDM Memory Map
Global Address
Module
Size
(Bytes)
0x3_FF00–0x3_FF0B
BDM registers
12
0x3_FF0C–0x3_FF0E
BDM firmware ROM
3
0x3_FF0F
Family ID (part of BDM firmware ROM)
1
0x3_FF10–0x3_FFFF
BDM firmware ROM
240
Global
Address
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x3_FF00
Reserved
R
X
X
X
X
X
X
0
0
W
0x3_FF01
BDMSTS
R
0
0
0
W
0x3_FF02
Reserved
R
X
X
X
X
X
X
X
X
W
0x3_FF03
Reserved
R
X
X
X
X
X
X
X
X
W
0x3_FF04
Reserved
R
X
X
X
X
X
X
X
X
W
0x3_FF05
Reserved
R
X
X
X
X
X
X
X
X
W
0x3_FF06
BDMCCR
R
CCR7
CCR6
CCR5
CCR4
CCR3
CCR2
CCR1
CCR0
W
0x3_FF07
Reserved
R
0
0
0
0
0
0
0
0
W
= Unimplemented, Reserved
= Implemented (do not alter)
X
= Indeterminate
0
= Always read zero
Figure 7-2. BDM Register Summary