Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos

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Freescale Semiconductor

On simultaneous matches the lowest channel number has priority so with this configuration the forking
from State1 has the peculiar effect that a simultaneous match0/match1 transitions to final state but a
simultaneous match2/match1transitions to state2.

Trigger when a routine/event at M2 follows either M1 or M0.

Trigger when an event M2 is followed by either event M0 or event M1

Scenario 8a and 8b are possible with the S12SDBGV1 and S12SDBGV2 SCR encoding

Trigger when a routine/event at A (M2) does not follow either B or C (M1 or M0) before they are executed
again. This cannot be realized with theS12SDBGV1 SCR encoding due to OR limitations. By changing
the SCR2 encoding as shown in red this scenario becomes possible.

Trigger if an event M0 occurs following up to two successive M2 events without the resetting event M1.
As shown up to 2 consecutive M2 events are allowed, whereby a reset to State1 is possible after either one
or two M2 events. If an event M0 occurs following the second M2, before M1 resets to State1 then a trigger