Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos
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TWR-S12GN32-KIT
S12 Clock, Reset and Power Management Unit (S12CPMU)
MC9S12G Family Reference Manual,
Rev.1.23
388
Freescale Semiconductor
10.3.2.10 Reserved Register CPMUTEST0
NOTE
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in Special
Mode can alter the S12CPMU’s functionality.
intended for general user access. Writing to this register when in Special
Mode can alter the S12CPMU’s functionality.
Read: Anytime
Write: Only in Special Mode
10.3.2.11 Reserved Register CPMUTEST1
NOTE
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in Special
Mode can alter the S12CPMU’s functionality.
intended for general user access. Writing to this register when in Special
Mode can alter the S12CPMU’s functionality.
Read: Anytime
Write: Only in Special Mode
0x003D
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-13. Reserved Register (CPMUTEST0)
0x003E
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-14. Reserved Register (CPMUTEST1)