Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos

456

Freescale Semiconductor

Writes to this register will abort current conversion sequence and start a new conversion sequence. If the
external trigger function is enabled (ETRIGE=1) an initial write to ATDCTL5 is required to allow starting
of a conversion sequence which will then occur on each trigger event. Start of conversion means the
beginning of the sampling phase.

Read: Anytime

Write: Anytime

1

1

1

24

 Module Base + 0x0005

7

6

5

4

3

2

1

0

R

0

SC

SCAN

MULT

CD

CC

CB

CA

W

Reset

0

0

0

0

0

0

0

0

= Unimplemented or Reserved

6

SC

Special Channel Conversion Bit — If this bit is set, then special channel conversion can be selected using CD,
CC, CB and CA of ATDCTL5.

0 Special channel conversions disabled
1 Special channel conversions enabled

5

SCAN

Continuous Conversion Sequence Mode — This bit selects whether conversion sequences are performed
continuously or only once. If the external trigger function is enabled (ETRIGE=1) setting this bit has no effect,
thus the external trigger always starts a single conversion sequence.
0 Single conversion sequence
1 Continuous conversion sequences (scan mode)