Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Hoja De Datos
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TWR-S12GN32-KIT
Serial Communication Interface (S12SCIV5)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
703
20.5.3.1.8
BKDIF Description
The BKDIF interrupt is set when a break signal was received. Clear BKDIF by writing a “1” to the
SCIASR1 SCI alternative status register 1. This flag is also cleared if break detect feature is disabled.
SCIASR1 SCI alternative status register 1. This flag is also cleared if break detect feature is disabled.
20.5.4
Recovery from Wait Mode
The SCI interrupt request can be used to bring the CPU out of wait mode.
20.5.5
Recovery from Stop Mode
An active edge on the receive input can be used to bring the CPU out of stop mode.