Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Hoja De Datos
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AT91SAM9M10-G45-EK
32
SAM9M10 [SUMMARY]
6355ES–ATARM–12-Mar-13
8.6
Slow Clock Selection
The SAM9M10 slow clock can be generated either by an external 32768Hz crystal or the on-chip RC oscillator. The
32768 Hz crystal oscillator can be bypassed, by setting the bit OSC32BYP, to accept an external slow clock on XIN32.
32768 Hz crystal oscillator can be bypassed, by setting the bit OSC32BYP, to accept an external slow clock on XIN32.
The internal RC oscillator and the 32768 Hz oscillator can be enabled by setting to 1 respectively RCEN bit and
OSC32EN bit in the system controller user interface. OSCSEL command selects the slow clock source.
OSC32EN bit in the system controller user interface. OSCSEL command selects the slow clock source.
RCEN, OSC32EN,OSCSEL and OSC32BYP bits are located in the slow clock control register (SCKCR) located at
address 0xFFFFFD50 in the backup part of the system controller and so are preserved while VDDBU is present.
address 0xFFFFFD50 in the backup part of the system controller and so are preserved while VDDBU is present.
Figure 8-3.
Slow Clock
After a VDDBU power on reset, the default configuration is RCEN = 1, OSC32EN = 0 and OSCSEL = 0 allowing the
system to start on the internal RC oscillator.
system to start on the internal RC oscillator.
The programmer controls by software the slow clock switching and so must take precautions during the switching phase.
8.6.1
Switch from Internal RC Oscillator to the 32768 Hz Crystal
To switch from internal RC oscillator to the 32768 Hz crystal, the programmer must execute the following sequence:
z
Switch the master clock to a source different from slow clock (PLLA or PLLB or Main Oscillator) through the Power
Management Controller.
Management Controller.
z
Enable the 32768 Hz oscillator by setting the bit OSCEN to 1.
z
Wait 32768 Hz startup time for clock stabilization (software loop).
z
Switch from internal RC to 32768 Hz by setting the bit OSCSEL to 1.
z
Wait 5 slow clock cycles for internal resynchronization.
z
Disable the RC oscillator by setting the bit RCEN to 0.
8.6.2
Bypass the 32768 Hz Oscillator
The following step must be added to bypass the 32768 Hz Oscillator.
z
An external clock must be connected on XIN32.
z
Enable the bypass path OSC32BYP bit set to 1.
z
Disable the 32768 Hz oscillator by setting the bit OSC32EN to 0.
8.6.3
Switch from 32768 Hz Crystal to the Internal RC Oscillator
The same procedure must be followed to switch from 32768 Hz crystal to the internal RC oscillator.
z
Switch the master clock to a source different from slow clock (PLLA or PLLB or Main Oscillator).
z
Enable the internal RC oscillator by setting the bit RCEN to 1.
O
n Chip
RC O
SC
Slow Cloc
SLCK
SLCK
XIN32
XO
UT32
Slow Cloc
O
scillator
Cloc Generator
O
SC32EN
RCEN
O
SCSEL
O
SC32BYP