Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos

5-22

ARM DDI0198D

•

If a fast design is more important than minimizing power consumption, you must 
follow the example in Optimizing for speed on page 5-23.

The rules for producing memory out of smaller RAM blocks are:

•

There must be an even number of RAM blocks b (b = 2, 4, 8, for example)

•

Each RAM block must be the same size.

•

If the address width of the required memory size is n bits, the address port of the 
smaller RAM blocks is m = n-(log

b

/log

2

) bits wide.

•

Address bits [m-1:0] are applied to all the RAM blocks.

•

Address bits [n-1:m] are gated with DRCS for a power optimized solution, or 
with IRnRW for a speed optimized solution.

•

Pipelined address bits [n-1:m] are used to select the correct RAM read data.

Figure 5-14 on page 5-23 shows how to produce a large memory from two smaller 
RAM blocks if you are optimizing for power. Separate chip select control is required 
for each RAM block:

CS_bank0 =  ~DRADDR[14] & DRCS

CS_bank1 =  DRADDR[14] & DRCS

This ensures that only the RAM being accessed is enabled, minimizing power 
consumption.