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SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1454
Figure 47-22. SPI Slave Mode with (CPOL = NCPHA = 0) or (CPOL= NCPHA= 1)
47.11.3.1   Maximum SPI Frequency
The following formulas give the maximum SPI frequency in Master read and write modes and in Slave read and
write modes.
Master Write Mode
The SPI only sends data to a slave device such as an LCD, for example. The limit is given by SPI
2
 (or SPI
5
) timing.
Since it gives a maximum frequency above the pin FreqMax value (see 
), the
max SPI frequency is defined by the pin FreqMax value.
Master Read Mode
t
VALID 
is the slave time response to output data after detecting an SPCK edge. For Atmel SPI DataFlash
(AT45DB642D), t
VALID
 (or t
v
) is 12 ns Max.
In the formula above, f
SPCK 
Max = 33.0 MHz @ V
VDDIO
 = 3.3V.
Slave Read Mode
In slave mode, SPCK is the input clock for the SPI. The max SPCK frequency is given by setup and hold timings
SPI
7
/SPI
8
(or SPI
10
/SPI
11
). Since this gives a frequency well above the pad limit, the limit in slave read mode is
given by SPCK pad.
Slave Write Mode
For 3.3V I/O domain and SPI
6
, f
SPCK
Max = 25 MHz. t
SETUP 
is the setup time from the master before sampling data.
SPCK
MISO
MOSI
SPI
9
SPI
10
SPI
11
NPCS0
SPI
14
SPI
15
f
SPCK
Max
1
SPI
0
orSPI
3
(
t
valid
+
------------------------------------------------------
=
f
SPCK
Max
1
2x S
PI
6max
orSPI
9max
(
t
setup
)
+
-------------------------------------------------------------------------------------
=