Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos
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AT91SAM9N12-EK
772
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 40-23. Timeguard Operations
indicates the maximum length of a timeguard period that the transmitter can handle in relation to the function
of the baud rate.
40.7.3.11 Receiver Time-out
The Receiver Time-out provides support in handling variable-length frames. This feature detects an idle condition on the
RXD line. When a time-out is detected, the bit TIMEOUT in the US_CSR rises and can generate an interrupt, thus
indicating to the driver an end of frame.
RXD line. When a time-out is detected, the bit TIMEOUT in the US_CSR rises and can generate an interrupt, thus
indicating to the driver an end of frame.
The time-out delay period (during which the receiver waits for a new character) is programmed in the TO field of the
Receiver Time-out Register (US_RTOR). If the TO field is written to 0, the Receiver Time-out is disabled and no time-out
is detected. The TIMEOUT bit in the US_CSR remains at 0. Otherwise, the receiver loads a 16-bit counter with the value
programmed in TO. This counter is decremented at each bit period and reloaded each time a new character is received.
If the counter reaches 0, the TIMEOUT bit in the US_CSR rises. Then, the user can either:
Receiver Time-out Register (US_RTOR). If the TO field is written to 0, the Receiver Time-out is disabled and no time-out
is detected. The TIMEOUT bit in the US_CSR remains at 0. Otherwise, the receiver loads a 16-bit counter with the value
programmed in TO. This counter is decremented at each bit period and reloaded each time a new character is received.
If the counter reaches 0, the TIMEOUT bit in the US_CSR rises. Then, the user can either:
Stop the counter clock until a new character is received. This is performed by writing a one to the STTTO (Start
Time-out) bit the US_CR. In this case, the idle state on RXD before a new character is received will not provide a
time-out. This prevents having to handle an interrupt before a character is received and allows waiting for the next
idle state on RXD after a frame is received.
Time-out) bit the US_CR. In this case, the idle state on RXD before a new character is received will not provide a
time-out. This prevents having to handle an interrupt before a character is received and allows waiting for the next
idle state on RXD after a frame is received.
Obtain an interrupt while no character is received. This is performed by writing a one to the RETTO (Reload and
Start Time-out) bit in the US_CR. If RETTO is performed, the counter starts counting down immediately from the
value TO. This enables generation of a periodic interrupt so that a user time-out can be handled, for example when
no key is pressed on a keyboard.
Start Time-out) bit in the US_CR. If RETTO is performed, the counter starts counting down immediately from the
value TO. This enables generation of a periodic interrupt so that a user time-out can be handled, for example when
no key is pressed on a keyboard.
D0
D1
D2
D3
D4
D5
D6
D7
TXD
Start
Bit
Parity
Bit
Stop
Bit
Baud Rate
Clock
Start
Bit
TG = 4
Write
US_THR
D0
D1
D2
D3
D4
D5
D6
D7
Parity
Bit
Stop
Bit
TXRDY
TXEMPTY
TG = 4
Table 40-9. Maximum Timeguard Length Depending on Baud Rate
Baud Rate (Bit/s)
Bit Time (µs)
Timeguard (ms)
1,200
833
212.50
9,600
104
26.56
14,400 69.4
17.71
19,200
52.1
13.28
28,800
34.7
8.85
38,400
26
6.63
56,000
17.9
4.55
57,600
17.4
4.43
115,200
8.7
2.21