Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Hoja De Datos
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AT91SAM9M10-G45-EK
1015
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
The AC97 Codec can drive AC97RX signal from low to high level and holding it high until the controller issues
either a cold or a worm reset. The AC97RX rising edge is asynchronously (regarding AC97FS) detected by the
AC97 Controller. If WKUP bit is enabled in AC97C_IMR register, an interrupt is triggered that wakes up the AC97
Controller which should then immediately issue a cold or a warm reset.
either a cold or a worm reset. The AC97RX rising edge is asynchronously (regarding AC97FS) detected by the
AC97 Controller. If WKUP bit is enabled in AC97C_IMR register, an interrupt is triggered that wakes up the AC97
Controller which should then immediately issue a cold or a warm reset.
If the processor needs to be awakened by an external event, the AC97RX signal must be externally connected to
the WAKEUP entry of the system controller.
the WAKEUP entry of the system controller.
Figure 43-7.
AC97 Power-Down/Up Sequence
43.7.5.5
AC97 Codec Reset
There are three ways to reset an AC97 Codec.
43.7.5.6
Cold AC97 Reset
A cold reset is generated by asserting the RESET signal low for the minimum specified time (depending on the
AC97 Codec) and then by de-asserting RESET high. AC97CK and AC97FS is reactivated and all AC97 Codec
registers are set to their default power-on values. Transfers on AC-link can resume.
AC97 Codec) and then by de-asserting RESET high. AC97CK and AC97FS is reactivated and all AC97 Codec
registers are set to their default power-on values. Transfers on AC-link can resume.
The RESET signal will be controlled via a PIO line. This is how an application should perform a cold reset:
• Clear and set ENA flag in the AC97C_MR register to reset the AC97 Controller
• Clear PIO line output controlling the AC97 RESET signal
• Wait for the minimum specified time
• Set PIO line output controlling the AC97 RESET signal
AC97CK, the clock provided by AC97 Codec, is detected by the controller.
43.7.5.7
Warm AC97 Reset
A warm reset reactivates the AC-link without altering AC97 Codec registers. A warm reset is signaled by driving
AC97FX signal high for a minimum of 1us in the absence of AC97CK. In the absence of AC97CK, AC97FX is
treated as an asynchronous (regarding AC97FX) input used to signal a warm reset to AC97 Codec.
AC97FX signal high for a minimum of 1us in the absence of AC97CK. In the absence of AC97CK, AC97FX is
treated as an asynchronous (regarding AC97FX) input used to signal a warm reset to AC97 Codec.
This is the right way to perform a warm reset:
• Set WRST in the AC97C_MR register.
• Wait for at least 1us
• Clear WRST in the AC97C_MR register.
The application can check that operations have resumed by checking SOF flag in the AC97C_SR register or wait
for an interrupt notice if SOF is enabled in AC97C_IMR.
for an interrupt notice if SOF is enabled in AC97C_IMR.
AC97CK
AC97FS
TAG
Write to
0x26
Data
PR4
Power Down Frame
Sleep State
TAG
Write to
0x26
Data
PR4
Wake Event
Warm Reset
New Audio Frame
TAG
Slot1
Slot2
AC97TX
AC97RX
TAG
Slot1
Slot2