Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Hoja De Datos
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AT91SAM9M10-G45-EK
120
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
17.4
I/O Lines Description
17.5
Product Dependencies
17.5.1
Power Management
The Shutdown Controller is continuously clocked by Slow Clock. The Power Management Controller has no effect
on the behavior of the Shutdown Controller.
on the behavior of the Shutdown Controller.
17.6
Functional Description
The Shutdown Controller manages the main power supply. To do so, it is supplied with VDDBU and manages
wake-up input pins and one output pin, SHDN.
wake-up input pins and one output pin, SHDN.
A typical application connects the pin SHDN to the shutdown input of the DC/DC Converter providing the main
power supplies of the system, and especially VDDCORE and/or VDDIO. The wake-up inputs (WKUP0) connect to
any push-buttons or signal that wake up the system.
power supplies of the system, and especially VDDCORE and/or VDDIO. The wake-up inputs (WKUP0) connect to
any push-buttons or signal that wake up the system.
The software is able to control the pin SHDN by writing the Shutdown Control Register (SHDW_CR) with the bit
SHDW at 1. The shutdown is taken into account only 2 slow clock cycles after the write of SHDW_CR. This register
is password-protected and so the value written should contain the correct key for the command to be taken into
account. As a result, the system should be powered down.
SHDW at 1. The shutdown is taken into account only 2 slow clock cycles after the write of SHDW_CR. This register
is password-protected and so the value written should contain the correct key for the command to be taken into
account. As a result, the system should be powered down.
A level change on WKUP0 is used as wake-up. Wake-up is configured in the Shutdown Mode Register
(SHDW_MR). The transition detector can be programmed to detect either a positive or negative transition or any
level change on WKUP0. The detection can also be disabled. Programming is performed by defining WKMODE0.
(SHDW_MR). The transition detector can be programmed to detect either a positive or negative transition or any
level change on WKUP0. The detection can also be disabled. Programming is performed by defining WKMODE0.
Moreover, a debouncing circuit can be programmed for WKUP0. The debouncing circuit filters pulses on WKUP0
shorter than the programmed number of 16 SLCK cycles in CPTWK0 of the SHDW_MR register. If the pro-
grammed level change is detected on a pin, a counter starts. When the counter reaches the value programmed in
the corresponding field, CPTWK0, the SHDN pin is released. If a new input change is detected before the counter
reaches the corresponding value, the counter is stopped and cleared. WAKEUP0 of the Status Register
(SHDW_SR) reports the detection of the programmed events on WKUP0 with a reset after the read of SHDW_SR.
shorter than the programmed number of 16 SLCK cycles in CPTWK0 of the SHDW_MR register. If the pro-
grammed level change is detected on a pin, a counter starts. When the counter reaches the value programmed in
the corresponding field, CPTWK0, the SHDN pin is released. If a new input change is detected before the counter
reaches the corresponding value, the counter is stopped and cleared. WAKEUP0 of the Status Register
(SHDW_SR) reports the detection of the programmed events on WKUP0 with a reset after the read of SHDW_SR.
The Shutdown Controller can be programmed so as to activate the wake-up using the RTT alarm (the detection of
the rising edge of the RTT alarm is synchronized with SLCK). This is done by writing the SHDW_MR register using
the RTTWKEN fields. When enabled, the detection of the RTT alarm is reported in the RTTWK bit of the
SHDW_SR Status register. It is reset after the read of SHDW_SR. When using the RTT alarm to wake up the sys-
tem, the user must ensure that the RTT alarm status flag is cleared before shutting down the system. Otherwise,
no rising edge of the status flag may be detected and the wake-up fails.
the rising edge of the RTT alarm is synchronized with SLCK). This is done by writing the SHDW_MR register using
the RTTWKEN fields. When enabled, the detection of the RTT alarm is reported in the RTTWK bit of the
SHDW_SR Status register. It is reset after the read of SHDW_SR. When using the RTT alarm to wake up the sys-
tem, the user must ensure that the RTT alarm status flag is cleared before shutting down the system. Otherwise,
no rising edge of the status flag may be detected and the wake-up fails.
The Shutdown Controller can be programmed so as to activate the wake-up using the RTC alarm (the detection of
the rising edge of the RTC alarm is synchronized with SLCK). This is done by writing the SHDW_MR register using
the RTCWKEN field. When enabled, the detection of the RTC alarm is reported in the RTCWK bit of the
SHDW_SR Status register. It is reset after the read of SHDW_SR. When using the RTC alarm to wake up the sys-
tem, the user must ensure that the RTC alarm status flag is cleared before shutting down the system. Otherwise,
no rising edge of the status flag may be detected and the wake-up fails fail.
the rising edge of the RTC alarm is synchronized with SLCK). This is done by writing the SHDW_MR register using
the RTCWKEN field. When enabled, the detection of the RTC alarm is reported in the RTCWK bit of the
SHDW_SR Status register. It is reset after the read of SHDW_SR. When using the RTC alarm to wake up the sys-
tem, the user must ensure that the RTC alarm status flag is cleared before shutting down the system. Otherwise,
no rising edge of the status flag may be detected and the wake-up fails fail.
Table 17-1.
I/O Lines Description
Name
Description
Type
WKUP0
Wake-up 0 input
Input
SHDN
Shutdown output
Output