Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Hoja De Datos
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AT91SAM9M10-G45-EK
156
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
20.2
External Bus Interface (EBI)
20.2.1
Description
The External Bus Interface (EBI) is designed to ensure the successful data transfer between several external
devices and the embedded Memory Controller of an ARM-based device.
devices and the embedded Memory Controller of an ARM-based device.
The Static Memory, DDR, SDRAM and ECC Controllers are all featured external Memory Controllers on the EBI.
These external Memory Controllers are capable of handling several types of external memory and peripheral
devices, such as SRAM, PROM, EPROM, EEPROM, Flash, DDR2 and SDRAM. The EBI operates with 1.8V or
3.3V Power Supply (VDDIOM1).
These external Memory Controllers are capable of handling several types of external memory and peripheral
devices, such as SRAM, PROM, EPROM, EEPROM, Flash, DDR2 and SDRAM. The EBI operates with 1.8V or
3.3V Power Supply (VDDIOM1).
The EBI also supports the CompactFlash and the NAND Flash protocols via integrated circuitry that greatly
reduces the requirements for external components. Furthermore, the EBI handles data transfers with up to six
external devices, each assigned to six address spaces defined by the embedded Memory Controller. Data trans-
fers are performed through a 16-bit or 32-bit data bus, an address bus of up to 26 bits, up to six chip select lines
(NCS[5:0]) and several control pins that are generally multiplexed between the different external Memory
Controllers.
reduces the requirements for external components. Furthermore, the EBI handles data transfers with up to six
external devices, each assigned to six address spaces defined by the embedded Memory Controller. Data trans-
fers are performed through a 16-bit or 32-bit data bus, an address bus of up to 26 bits, up to six chip select lines
(NCS[5:0]) and several control pins that are generally multiplexed between the different external Memory
Controllers.
20.2.2
Embedded Characteristics
The SAM9M10 features an External Bus Interface to interface to a wide range of external memories and to any
parallel peripheral.
parallel peripheral.
20.2.2.1
External Bus Interface
• Integrates Three External Memory Controllers:
– Static Memory Controller
– DDR2/SDRAM Controller
– SLC Nand Flash ECC Controller
• Additional logic for NAND Flash
and CompactFlash
• Optional Full 32-bit External Data Bus
• Up to 26-bit Address Bus (up to 64 MBytes linear per chip select)
• Up to 6 chip selects, Configurable Assignment:
– Static Memory Controller on NCS0
– DDR2/SDRAM Controller (SDCS) or Static Memory Controller on NCS1
– Static Memory Controller on NCS2
– Static Memory Controller on NCS3, Optional NAND Flash support
– Static Memory Controller on NCS4 - NCS5, Optional CompactFlash
M
support
20.2.2.2
Static Memory Controller
• 8-, 16- or 32-bit Data Bus
• Multiple Access Modes supported
– Byte Write or Byte Select Lines
– Asynchronous read in Page Mode supported (4- up to 32-byte page size)
• Multiple device adaptability
– Control signals programmable setup, pulse and hold time for each Memory Bank
• Multiple Wait State Management
– Programmable Wait State Generation
– External Wait Request