Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Hoja De Datos

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SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

The intent of the RMII is to provide a reduced pin count alternative to the IEEE 802.3u MII. It uses 2 bits for transmit
(ETX0 and ETX1) and two bits for receive (ERX0 and ERX1). There is a Transmit Enable (ETXEN), a Receive
Error (ERXER), a Carrier Sense (ECRS_DV), and a 50 MHz Reference Clock (ETXCK_EREFCK) for 100Mb/s
data rate.

The same signals are used internally for both the RMII and the MII operations. The RMII maps these signals in a
more pin-efficient manner. The transmit and receive bits are converted from a 4-bit parallel format to a 2-bit parallel
scheme that is clocked at twice the rate. The carrier sense and data valid signals are combined into the ECRSDV
signal. This signal contains information on carrier sense, FIFO status, and validity of the data. Transmit error bit
(ETXER) and collision detect (ECOL) are not used in RMII mode.

ERXCK

ERXCK: Receive Clock

ETXEN

ETXEN: Transmit Enable

ETXEN: Transmit Enable

ETX0-ETX3

ETX0 - ETX3: 4-bit Transmit Data

ETX0 - ETX1: 2-bit Transmit Data

ETXER

ETXER: Transmit Error

Pin Configuration