Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Hoja De Datos

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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
Figure  41-14.
DMAC Transfer Replay Mode is Enabled for the Source and Contiguous Destination Address
41.4.5.7
Multi-buffer DMAC Transfer with Linked List for Source and Contiguous Destination Address (Row 2)
1.
Read the Channel Enable register to choose a free (disabled) channel.
2.
Set up the linked list in memory. Write the control information in the LLI.DMAC_CTRLAx and 
LLI.DMAC_CTRLBx register location of the buffer descriptor for each LLI in memory for channel x. For 
example, in the register, you can program the following: 
a.
Set up the transfer type (memory or non-memory peripheral for source and destination) and flow con-
trol device by programming the FC of the DMAC_CTRLBx register.
b.
Set up the transfer characteristics, such as:
– i. Transfer width for the source in the SRC_WIDTH field.
– ii. Transfer width for the destination in the DST_WIDTH field.
– iii. Source AHB master interface layer in the SIF field where source resides.
– iv. Destination AHB master interface layer in the DIF field where destination resides.
– v. Incrementing/decrementing or fixed address for source in SRC_INCR field.
– vi. Incrementing/decrementing or fixed address for destination DST_INCR field.
3.
Write the starting destination address in the DMAC_DADDRx register for channel x.
Channel Enabled by
software
Buffer Transfer
Replay mode for SADDRx,
Contiguous mode for DADDRx
CTRLAx, CTRLBx
Channel Disabled by
hardware
Buffer Complete interrupt
generated here
Buffer Transfer Complete 
interrupt generated here
yes
no
no
yes
Stall until STALLED field is
cleared by software writing
KEEPON Field
DMA_EBCIMR[x]=1
Is HDMA in Row1of 
HDMA State Machine Table