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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
12.9.1.6 System Control Register
Name:
SCB_SCR
Access: Read-write
Reset: 0x000000000
• SEVONPEND: Send Event on Pending Bit
0: Only enabled interrupts or events can wake up the processor; disabled interrupts are excluded.
1: Enabled events and all interrupts, including disabled interrupts, can wake up the processor.
The processor also wakes up on execution of an SEV instruction or an external event.
• SLEEPDEEP: Sleep or Deep Sleep
Controls whether the processor uses sleep or deep sleep as its low power mode:
0: Sleep.
1: Deep sleep.
• SLEEPONEXIT: Sleep-on-exit
Indicates sleep-on-exit when returning from the Handler mode to the Thread mode:
0: Do not sleep when returning to Thread mode.
1: Enter sleep, or deep sleep, on return from an ISR. 
Setting this bit to 1 enables an interrupt-driven application to avoid returning to an empty main application.
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0
SEVONPEND
SLEEPDEEP
SLEEPONEXIT