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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
Byte-invariant
In a byte-invariant system, the address of each byte of memory remains unchanged when switching 
between little-endian and big-endian operation. When a data item larger than a byte is loaded from or 
stored to memory, the bytes making up that data item are arranged into the correct order depending 
on the endianness of the memory access. 
An ARM byte-invariant implementation also supports unaligned halfword and word memory accesses. 
It expects multi-word accesses to be word-aligned.
Condition field
A four-bit field in an instruction that specifies a condition under which the instruction can execute.
Conditional execution
If the condition code flags indicate that the corresponding condition is true when the instruction starts 
executing, it executes normally. Otherwise, the instruction does nothing.
Context
The environment that each process operates in for a multitasking operating system. In ARM 
processors, this is limited to mean the physical address range that it can access in memory and the 
associated memory access permissions.
Coprocessor
A processor that supplements the main processor. Cortex-M4 does not support any coprocessors.
Debugger
A debugging system that includes a program, used to detect, locate, and correct software faults, 
together with custom hardware that supports software debugging.
Direct Memory Access 
(DMA)
An operation that accesses main memory directly, without the processor performing any accesses to 
the data concerned.
Doubleword
A 64-bit data item. The contents are taken as being an unsigned integer unless otherwise stated.
Doubleword-aligned
A data item having a memory address that is divisible by eight.
Endianness
Byte ordering. The scheme that determines the order that successive bytes of a data word are stored 
in memory. An aspect of the system’s memory mapping. 
Exception
An event that interrupts program execution. When an exception occurs, the processor suspends the 
normal program flow and starts execution at the address indicated by the corresponding exception 
vector. The indicated address contains the first instruction of the handler for the exception. 
An exception can be an interrupt request, a fault, or a software-generated system exception. Faults 
include attempting an invalid memory access, attempting to execute an instruction in an invalid 
processor state, and attempting to execute an undefined instruction.