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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
In this mode, the clocks of the core, peripherals and memories are stopped. However, the core, peripherals and
memories power supplies are still powered. From this mode, a fast start up is available.
This mode is entered by setting the WAITMODE bit to 1 in the  CKGR_MOR register in conjunction with FLPM = 0 or
FLPM = 1 bits of the PMC_FSMR register or by the WFE instruction.
The Cortex-M4 is able to handle external or internal events in order to wake-up the core. This is done by configuring the
external lines WUP0-15 as fast startup wake-up pins (refer to 
). RTC or RTT Alarm and USB
wake-up events can be used to wake up the CPU.
To enter wait mode with WAITMODE bit:
Select the 4/8/12 MHz fast RC oscillator as Main Clock.
Set the FLPM field in the PMC Fast Startup Mode Register (PMC_FSMR). 
Set Flash Wait State at 0.
Set the WAITMODE bit = 1 in PMC Main Oscillator Register (CKGR_MOR).
Wait for Master Clock Ready MCKRDY = 1 in the PMC Status Register (PMC_SR).
To enter wait mode with WFE:
Select the 4/8/12 MHz fast RC oscillator as Main Clock.
Set the FLPM field in the PMC Fast Startup Mode Register (PMC_FSMR). 
Set Flash Wait State at 0.
Set the LPM bit in the PMC Fast Startup Mode Register (PMC_FSMR). 
Execute the Wait-For-Event (WFE) instruction of the processor.
In both cases, depending on the value of the field Flash Low Power Mode (FLPM), the Flash enters three different 
modes:
FLPM = 0 in Standby mode (Low consumption)
FLPM = 1 in Deep power-down mode (Extra low consumption)
FLPM = 2 in Idle mode. Memory ready for Read access
 summarizes the power consumption, wake-up time and system state in wait mode.
5.5.3
Sleep Mode
The purpose of sleep mode is to optimize power consumption of the device versus response time. In this mode, only the
core clock is stopped. The peripheral clocks can be enabled. The current consumption in this mode is application
dependent.
This mode is entered via Wait for Interrupt (WFI) or WFE instructions.
The processor can be awakened from an interrupt if the WFI instruction of the Cortex-M4 is used or from an event if the
WFE instruction is used.