Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

Los códigos de productos

ATSAM4S-XPLD

329

SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

21.2.3 Entering Programming Mode

The following algorithm puts the device in Parallel Programming Mode:



Apply GND, VDDIO, VDDCORE and VDDPLL.



Apply XIN clock within T

POR_RESET

if an external clock is available.



Wait for T

POR_RESET



Start a read or write handshaking.

Note:

After reset, the device is clocked by the internal RC oscillator. Before clearing RDY signal, if an external clock (>
32 kHz) is connected to XIN, then the device switches on the external clock. Else, XIN input is not considered. A
higher frequency on XIN speeds up the programmer handshake.

21.2.4 Programmer Handshaking

An handshake is defined for read and write operations. When the device is ready to start a new operation (RDY signal
set), the programmer starts the handshake by clearing the NCMD signal. The handshaking is achieved once NCMD
signal is high and RDY is high.

21.2.4.1 Write Handshaking

For details on the write handshaking sequence, refer to

Figure 21-2

and

Table 21-4

Figure 21-2. SAM4SxB/C (64/100 pins) Parallel Programming Timing, Write Sequence

0x0015

GLB

Get Lock Bit

0x0034

SGPB

Set General Purpose NVM bit

0x0044

CGPB

Clear General Purpose NVM bit

0x0025

GGPB

Get General Purpose NVM bit

0x0054

SSE

Set Security Bit

0x0035

GSE

Get Security Bit

0x001F

WRAM

Write Memory

0x001E

GVE

Get Version

Table 21-3. Command Bit Coding (Continued)

DATA[15:0]

Symbol

Command Executed

NCMD

RDY

NOE

NVALID

DATA[7:0]

MODE[3:0]