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ATSAM4S-XPLD
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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
The Write Page command (WP) is optimized for consecutive writes. Write handshaking can be chained; an internal
address buffer is automatically increased.
address buffer is automatically increased.
The Flash command Write Page and Lock (WPL) is equivalent to the Flash Write Command. However, the lock bit is
automatically set at the end of the Flash write operation. As a lock region is composed of several pages, the programmer
writes to the first pages of the lock region using Flash write commands and writes to the last page of the lock region using
a Flash write and lock command.
automatically set at the end of the Flash write operation. As a lock region is composed of several pages, the programmer
writes to the first pages of the lock region using Flash write commands and writes to the last page of the lock region using
a Flash write and lock command.
The Flash command Erase Page and Write (EWP) is equivalent to the Flash Write Command. However, before
programming the load buffer, the page is erased.
programming the load buffer, the page is erased.
The Flash command Erase Page and Write the Lock (EWPL) combines EWP and WPL commands.
21.2.5.3 Flash Full Erase Command
This command is used to erase the Flash memory planes.
All lock regions must be unlocked before the Full Erase command by using the CLB command. Otherwise, the erase
command is aborted and no page is erased.
command is aborted and no page is erased.
21.2.5.4 Flash Lock Commands
Lock bits can be set using WPL or EWPL commands. They can also be set by using the Set Lock command (SLB). With
this command, several lock bits can be activated. A Bit Mask is provided as argument to the command. When bit 0 of the
bit mask is set, then the first lock bit is activated.
this command, several lock bits can be activated. A Bit Mask is provided as argument to the command. When bit 0 of the
bit mask is set, then the first lock bit is activated.
In the same way, the Clear Lock command (CLB) is used to clear lock bits.
Table 21-7. Write Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0]
1
Write handshaking
CMDE
WP or WPL or EWP or EWPL
2
Write handshaking
ADDR0
Memory Address LSB
3
Write handshaking
ADDR1
Memory Address
4
Write handshaking
DATA
*Memory Address++
5
Write handshaking
DATA
*Memory Address++
...
...
...
...
n
Write handshaking
ADDR0
Memory Address LSB
n+1
Write handshaking
ADDR1
Memory Address
n+2
Write handshaking
DATA
*Memory Address++
n+3
Write handshaking
DATA
*Memory Address++
...
...
...
...
Table 21-8. Full Erase Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0]
1
Write handshaking
CMDE
EA
2
Write handshaking
DATA
0
Table 21-9. Set and Clear Lock Bit Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0]
1
Write handshaking
CMDE
SLB or CLB
2
Write handshaking
DATA
Bit Mask