Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

 383

SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

MATRIX_SCFG0..MATRIX_SCFG4

0x400E0240

Read-write 

When the SLOT_CYCLE limit is reach for a burst it may be broken by another master trying to access this slave.

This limit has been placed to avoid locking very slow slaves when very long bursts are used.

This limit should not be very small though. An unreasonable small value will break every burst and the Bus Matrix will spend its 
time to arbitrate without performing any data transfer. 16 cycles is a reasonable value for SLOT_CYCLE.

0: No Default Master

At the end of current slave access, if no other master request is pending, the slave is disconnected from all masters.

This results in having a one cycle latency for the first access of a burst transfer or for a single access.

1: Last Default Master

At the end of current slave access, if no other master request is pending, the slave stays connected to the last master having 
accessed it.

This results in not having the one cycle latency when the last master re-tries access on the slave again.

2: Fixed Default Master

At the end of the current slave access, if no other master request is pending, the slave connects to the fixed master the number 
that has been written in the FIXED_DEFMSTR field.

This results in not having the one cycle latency when the fixed master re-tries access on the slave again.

This is the number of the Default Master for this slave. Only used if DEFMSTR_TYPE is 2. Specifying the number of a master 
which is not connected to the selected slave is equivalent to setting DEFMSTR_TYPE to 0.

0: Round-Robin Arbitration

1: Fixed Priority Arbitration

2: Reserved

3: Reserved

31

30

29

28

27

26

25

24

–

–

–

–

–

–

ARBT

23

22

21

20

19

18

17

16

–

–

–

FIXED_DEFMSTR

DEFMSTR_TYPE

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

SLOT_CYCLE