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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
28.2.16.4PMC Peripheral Clock Enable Register 0
Name: 
PMC_PCER0
Address:
0x400E0410
Access:
Write-only 
This register can only be written if the WPEN bit is cleared in 
.
• PIDx: Peripheral Clock x Enable
0 = No effect.
1 = Enables the corresponding peripheral clock.
Note:
To get PIDx, refer to identifiers as defined in the section “Peripheral Identifiers” in the product datasheet. Other 
peripherals can be enabled in PMC_PCER1 (
).
Note:
Programming the control bits of the Peripheral ID that are not implemented has no effect on the behavior of the PMC. 
31
30
29
28
27
26
25
24
PID31
PID30
PID29
PID28
PID27
PID26
PID25
PID24
23
22
21
20
19
18
17
16
PID23
PID22
PID21
PID20
PID19
PID18
PID17
PID16
15
14
13
12
11
10
9
8
PID15
PID14
PID13
PID12
PID11
PID10
PID9
PID8
7
6
5
4
3
2
1
0