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ATSAM4S-XPLD
545
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
30.7.37 PIO Additional Interrupt Modes Disable Register
Name:
PIO_AIMDR
Address:
0x400E0EB4 (PIOA), 0x400E10B4 (PIOB), 0x400E12B4 (PIOC)
Access:
Write-only
• P0-P31: Additional Interrupt Modes Disable.
0: No effect.
1: The interrupt mode is set to the default interrupt mode (Both Edge detection).
30.7.38 PIO Additional Interrupt Modes Mask Register
Name:
PIO_AIMMR
Address:
0x400E0EB8 (PIOA), 0x400E10B8 (PIOB), 0x400E12B8 (PIOC)
Access:
Read-only
• P0-P31: Peripheral CD Status.
0: The interrupt source is a Both Edge detection event
1: The interrupt source is described by the registers PIO_ELSR and PIO_FRLHSR
31
30
29
28
27
26
25
24
P31
P30
P29
P28
P27
P26
P25
P24
23
22
21
20
19
18
17
16
P23
P22
P21
P20
P19
P18
P17
P16
15
14
13
12
11
10
9
8
P15
P14
P13
P12
P11
P10
P9
P8
7
6
5
4
3
2
1
0
P7
P6
P5
P4
P3
P2
P1
P0
31
30
29
28
27
26
25
24
P31
P30
P29
P28
P27
P26
P25
P24
23
22
21
20
19
18
17
16
P23
P22
P21
P20
P19
P18
P17
P16
15
14
13
12
11
10
9
8
P15
P14
P13
P12
P11
P10
P9
P8
7
6
5
4
3
2
1
0
P7
P6
P5
P4
P3
P2
P1
P0