Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos
Los códigos de productos
ATSAM4S-XPLD
565
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
In addition, the maximum clock speed allowed on the TK pin is:
Master Clock divided by 6 if Transmit Frame Synchro is input
Master Clock divided by 2 if Transmit Frame Synchro is output
31.7.2 Transmitter Operations
A transmitted frame is triggered by a start event and can be followed by synchronization data before data transmission.
The start event is configured by setting the Transmit Clock Mode Register (SSC_TCMR).
The frame synchronization is configured setting the Transmit Frame Mode Register (SSC_TFMR).
To transmit data, the transmitter uses a shift register clocked by the transmitter clock signal and the start mode selected
in the SSC_TCMR. Data is written by the application to the SSC_THR register then transferred to the shift register
according to the data format selected.
in the SSC_TCMR. Data is written by the application to the SSC_THR register then transferred to the shift register
according to the data format selected.
When both the SSC_THR and the transmit shift register are empty, the status flag TXEMPTY is set in SSC_SR. When
the Transmit Holding register is transferred in the Transmit shift register, the status flag TXRDY is set in SSC_SR and
additional data can be loaded in the holding register.
the Transmit Holding register is transferred in the Transmit shift register, the status flag TXRDY is set in SSC_SR and
additional data can be loaded in the holding register.
Figure 31-8. Transmitter Block Diagram
31.7.3 Receiver Operations
A received frame is triggered by a start event and can be followed by synchronization data before data transmission.
The start event is configured setting the Receive Clock Mode Register (SSC_RCMR).
The frame synchronization is configured setting the Receive Frame Mode Register (
SSC_RFMR
The receiver uses a shift register clocked by the receiver clock signal and the start mode selected in the SSC_RCMR.
The data is transferred from the shift register depending on the data format selected.
The data is transferred from the shift register depending on the data format selected.
When the receiver shift register is full, the SSC transfers this data in the holding register, the status flag RXRDY is set in
SSC_SR and the data can be read in the receiver holding register. If another transfer occurs before read of the RHR
register, the status flag OVERUN is set in SSC_SR and the receiver shift register is transferred in the RHR register.
SSC_SR and the data can be read in the receiver holding register. If another transfer occurs before read of the RHR
register, the status flag OVERUN is set in SSC_SR and the receiver shift register is transferred in the RHR register.
Transmit Shift Register
TD
SSC_TFMR.FSLEN
SSC_TFMR.DATLEN
SSC_TCMR.STTDLY
SSC_TFMR.FSDEN
SSC_TFMR.DATNB
SSC_TFMR.DATDEF
SSC_TFMR.MSBF
SSC_TFMR.FSDEN
SSC_TFMR.DATNB
SSC_TFMR.DATDEF
SSC_TFMR.MSBF
SSC_TCMR.STTDLY = 0
SSC_TFMR.FSDEN
1
0
TX Controller
SSC_TCMR.START
RF
Start
Selector
TXEN
RX Start
TXEN
RF
Start
Selector
RXEN
RC0R
TX Start
TX Start
Transmitter Clock
TX Controller counter reached STTDLY
SSC_RCMR.START
SSC_THR
SSC_TSHR
SSC_CRTXEN
SSC_SRTXEN
SSC_CRTXDIS