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ATSAM4S-XPLD
632
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
33.6.2 Power Management
Enable the peripheral clock.
The TWI interface may be clocked through the Power Management Controller (PMC), thus the programmer must first
configure the PMC to enable the TWI clock.
configure the PMC to enable the TWI clock.
33.6.3 Interrupt
The TWI interface has an interrupt line connected to the Interrupt Controller. In order to handle interrupts, the Interrupt
Controller must be programmed before configuring the TWI.
Controller must be programmed before configuring the TWI.
33.7
Functional Description
33.7.1 Transfer Format
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must be followed by an
acknowledgement. The number of bytes per transfer is unlimited (see
acknowledgement. The number of bytes per transfer is unlimited (see
).
A high-to-low transition on the TWD line while TWCK is high defines the START condition.
A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
Figure 33-3. START and STOP Conditions
Figure 33-4. Transfer Format
Table 33-5. Peripheral IDs
Instance
ID
TWI0
19
TWI1
20
TWD
TWCK
Start
Stop
TWD
TWCK
Start
Address
R/W
Ack
Data
Ack
Data
Ack
Stop