Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos
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ATSAM4S-XPLD
785
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
36.7.2 TC Channel Mode Register: Capture Mode
Name:
TC_CMRx [x=0..2] (WAVE = 0)
Address:
0x40010004 (0)[0], 0x40010044 (0)[1], 0x40010084 (0)[2], 0x40014004 (1)[0], 0x40014044 (1)[1],
0x40014084 (1)[2]
Access:
Read-write
This register can only be written if the WPEN bit is cleared in
• TCCLKS: Clock Selection
• CLKI: Clock Invert
0 = Counter is incremented on rising edge of the clock.
1 = Counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
• LDBSTOP: Counter Clock Stopped with RB Loading
0 = Counter clock is not stopped when RB loading occurs.
1 = Counter clock is stopped when RB loading occurs.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
LDRB
LDRA
15
14
13
12
11
10
9
8
WAVE
CPCTRG
–
–
–
ABETRG
ETRGEDG
7
6
5
4
3
2
1
0
LDBDIS
LDBSTOP
BURST
CLKI
TCCLKS
Value
Name
Description
0
TIMER_CLOCK1
Clock selected: TCLK1
1
TIMER_CLOCK2
Clock selected: TCLK2
2
TIMER_CLOCK3
Clock selected: TCLK3
3
TIMER_CLOCK4
Clock selected: TCLK4
4
TIMER_CLOCK5
Clock selected: TCLK5
5
XC0
Clock selected: XC0
6
XC1
Clock selected: XC1
7
XC2
Clock selected: XC2
Value
Name
Description
0
NONE
The clock is not gated by an external signal.
1
XC0
XC0 is ANDed with the selected clock.
2
XC1
XC1 is ANDed with the selected clock.
3
XC2
XC2 is ANDed with the selected clock.