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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
37.11 HSMCI Boot Operation Mode
In boot operation mode, the processor can read boot data from the slave (MMC device) by keeping the CMD line low
after power-on before issuing CMD1. The data can be read from either the boot area or user area, depending on register
setting. As it is not possible to boot directly on SD-CARD, a preliminary boot code must be stored in internal Flash.
37.11.1 Boot Procedure, Processor Mode
1.
Configure the HSMCI data bus width programming SDCBUS Field in the HSMCI_SDCR register. The 
BOOT_BUS_WIDTH field located in the device Extended CSD register must be set accordingly.
2.
Set the byte count to 512 bytes and the block count to the desired number of blocks, writing BLKLEN and BCNT 
fields of the HSMCI_BLKR Register.
3.
Issue the Boot Operation Request command by writing to the HSMCI_CMDR register with SPCMD field set to 
BOOTREQ, TRDIR set to READ and TRCMD set to “start data transfer”.
4.
The BOOT_ACK field located in the HSMCI_CMDR register must be set to one, if the BOOT_ACK field of the 
MMC device located in the Extended CSD register is set to one.
5.
Host processor can copy boot data sequentially as soon as the RXRDY flag is asserted.
6.
When Data transfer is completed, host processor shall terminate the boot stream by writing the HSMCI_CMDR 
register with SPCMD field set to BOOTEND.
37.12 HSMCI Transfer Done Timings
37.12.1 Definition
The XFRDONE flag in the HSMCI_SR indicates exactly when the read or write sequence is finished.
37.12.2 Read Access
Figure 37-11.XFRDONE During a Read Access
CMD line
HSMCI read CMD
Card response
CMDRDY flag
Data
1st Block
Last Block
Not busy flag
XFRDONE flag
The CMDRDY flag is released 8 tbit  after the end of the card response.