Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

 856

SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

The PWM is not continuously clocked. The programmer must first enable the PWM clock in the Power Management
Controller (PMC) before using the PWM. However, if the application does not require PWM operations, the PWM clock
can be stopped when not needed and be restarted later. In this case, the PWM will resume its operations where it left off.

In the PWM description, Master Clock (MCK) is the clock of the peripheral bus to which the PWM is connected.

The PWM interrupt line is connected on one of the internal sources of the Interrupt Controller. Using the PWM interrupt
requires the Interrupt Controller to be programmed first. Note that it is not recommended to use the PWM interrupt line in
edge sensitive mode.

The PWM has the FAULT inputs connected to the different modules. Please refer to the implementation of these module
within the product for detailed information about the fault generation procedure. The PWM receives faults from PIO
inputs, PMC, ADC controller, Analog Comparator Controller and Timer/Counters.

Note:

1. FPOL bit in PWMC_FMR.

The PWM macrocell is primarily composed of a clock generator module and 4 channels. 



Clocked by the master clock (MCK), the clock generator module provides 13 clocks.



Each channel can independently choose one of the clock generator outputs. 



Each channel generates an output waveform with attributes that can be defined independently for each channel 
through the user interface registers.

PWM

PWML2

PA30

A

PWM

PWML2

PB13

A

PWM

PWML2

PC2

B

PWM

PWML3

PA15

C

PWM

PWML3

PC3

B

PWM

PWML3

PC22

B

PWM

31

PA9

PWMFI0

User Defined

0

Main OSC (PMC)

–

1

1

ADC

–

1

2

Analog Comparator

–

1

3

Timer0

–

1

4

Timer1

–

1

5