Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

 89

SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

Rotate right with extend moves the bits of the register Rm to the right by one bit; and it copies the carry flag into bit[31] of
the result. See 

When the instruction is RRXS or when RRX is used in Operand2 with the instructions MOVS, MVNS, ANDS, ORRS,
ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to bit[0] of the register Rm.

An aligned access is an operation where a word-aligned address is used for a word, dual word, or multiple word access,
or where a halfword-aligned address is used for a halfword access. Byte accesses are always aligned.

The Cortex-M4 processor supports unaligned access only for the following instructions: 



LDR, LDRT



LDRH, LDRHT



LDRSH, LDRSHT



STR, STRT



STRH, STRHT

All other load and store instructions generate a usage fault exception if they perform an unaligned access, and therefore
their accesses must be address-aligned. For more information about usage faults, see 

Unaligned accesses are usually slower than aligned accesses. In addition, some memory regions might not support
unaligned accesses. Therefore, ARM recommends that programmers ensure that accesses are aligned. To avoid
accidental generation of unaligned accesses, use the UNALIGN_TRP bit in the Configuration and Control Register to
trap all unaligned accesses, see 

.

A PC-relative expression or label is a symbol that represents the address of an instruction or literal data. It is represented
in the instruction as the PC value plus or minus a numeric offset. The assembler calculates the required offset from the
label and the address of the current instruction. If the offset is too big, the assembler produces an error.



For B, BL, CBNZ, and CBZ instructions, the value of the PC is the address of the current instruction plus 4 bytes. 



For all other instructions that use labels, the value of the PC is the address of the current instruction plus 4 bytes, 
with bit[1] of the result cleared to 0 to make it word-aligned.



Your assembler might permit other syntaxes for PC-relative expressions, such as a label plus or minus a number, 
or an expression of the form [PC, #number]. 

Most data processing instructions can optionally update the condition flags in the Application Program Status Register
(APSR) according to the result of the operation, see 

. Some instructions update all

flags, and some only update a subset. If a flag is not updated, the original value is preserved. See the instruction
descriptions for the flags they affect.

An instruction can be executed conditionally, based on the condition flags set in another instruction, either:



Immediately after the instruction that updated the flags



After any number of intervening instructions that have not updated the flags.