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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
38.7.23 PWM Fault Mode Register
Name:
PWM_FMR
Address:
0x4002005C
Access:
Read-write
This register can only be written if the bits WPSWS5 and WPHWS5 are cleared in 
• FPOL: Fault Polarity (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
0 = The fault y becomes active when the fault input y is at 0.
1 = The fault y becomes active when the fault input y is at 1.
• FMOD: Fault Activation Mode (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
0 = The fault y is active until the Fault condition is removed at the peripheral
1 = The fault y stays active until the Fault condition is removed at the peripheral
 level AND until it is cleared in th
Note:
1. The Peripheral generating the fault.
• FFIL: Fault Filtering (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
0 = The fault input y is not filtered.
1 = The fault input y is filtered.
CAUTION: To prevent an unexpected activation of the status flag FSy in the 
FMODy can be set to “1” only if the FPOLy bit has been previously configured to its final value.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
FFIL
15
14
13
12
11
10
9
8
FMOD
7
6
5
4
3
2
1
0
FPOL