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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
To use an instruction width suffix, place it immediately after the instruction mnemonic and condition code, if any. The
example below shows instructions with the instruction width suffix.
    BCS.W  label      ; creates a 32-bit instruction even for a short 
                      ; branch
    ADDS.W R0, R0, R1 ; creates a 32-bit instruction even though the same
                      ; operation can be done by a 16-bit instruction
12.6.4 Memory Access Instructions
The table below shows the memory access instructions:
Table 12-17. Memory Access Instructions 
Mnemonic
Description
ADR
Load PC-relative address
CLREX
Clear Exclusive
LDM{mode}
Load Multiple registers
LDR{type}
Load Register using immediate offset
LDR{type}
Load Register using register offset
LDR{type}T
Load Register with unprivileged access
LDR
Load Register using PC-relative address
LDRD
 Load Register Dual 
LDREX{type}
Load Register Exclusive
POP
Pop registers from stack
PUSH
Push registers onto stack
STM{mode}
Store Multiple registers
STR{type}
Store Register using immediate offset
STR{type}
Store Register using register offset
STR{type}T
Store Register with unprivileged access
STREX{type}
Store Register Exclusive