Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

The ADC is based on a 12-bit Analog-to-Digital Converter (ADC) managed by an ADC Controller. Refer to the Block
Diagram: 

. It also integrates a 16-to-1 analog multiplexer, making possible the analog-to-digital conversions

of 16 analog lines. The conversions extend from 0V to the voltage carried on pin ADVREF. The ADC supports an 10-bit
or 12-bit resolution mode, and conversion results are reported in a common register for all channels, as well as in a
channel-dedicated register. 

Software trigger, external trigger on rising edge of the ADTRG pin or internal triggers from Timer Counter output(s) are
configurable. 

The comparison circuitry allows automatic detection of values below a threshold, higher than a threshold, in a given
range or outside the range, thresholds and ranges being fully configurable.

The ADC Controller internal fault output is directly connected to PWM Fault input. This input can be asserted by means of
comparison circuitry in order to immediately put the PWM outputs in a safe state (pure combinational path).

The ADC also integrates a Sleep Mode and a conversion sequencer and connects with a PDC channel. These features
reduce both power consumption and processor intervention.

This ADC has a selectable single-ended or fully differential input and benefits from a 2-bit programmable gain.

A digital error correction circuit based on the multi-bit redundant signed digit (RSD) algorithm is employed in order to
reduce INL and DNL errors.

Finally, the user can configure ADC timings, such as Startup Time and Tracking Time.

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up to 16 Channels, 12-bit ADC

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10/12-bit resolution

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up to 1 MSample/s

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Programmable conversion sequence conversion on each channel

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Integrated temperature sensor

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Automatic calibration mode

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Single ended/differential conversion

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Programmable gain: 1, 2, 4