Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

 984

SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

The ADC Controller has the FAULT output connected to the FAULT input of PWM. Please refer to

and implementation of the PWM in the product.

For performance and electrical characteristics of the ADC, see the product DC Characteristics section.

The ADC uses the ADC Clock to perform conversions. Converting a single analog value to a 12-bit digital data requires
Tracking Clock cycles as defined in the field TRACKTIM of the 

. The ADC Clock

frequency is selected in the PRESCAL field of the Mode Register (ADC_MR). The tracking phase starts during the
conversion of the previous channel. If the tracking time is longer than the conversion time, the tracking phase is extended
to the end of the previous conversion.

The ADC clock range is between MCK/2, if PRESCAL is 0, and MCK/512, if PRESCAL is set to 255 (0xFF). PRESCAL
must be programmed in order to provide an ADC clock frequency according to the parameters given in the product
Electrical Characteristics section.

ADCClock

LCDR

ADC_ON

Trigger event (Hard or Soft)

ADC_SEL

DRDY

ADC_Start

CH0

CH1

CH0

CH2

CH1

Transfer Period

Transfer Period

Start Up

Time

(and tracking of CH0)

Conversion

of CH0

Conversion

of CH1

Tracking of CH1

Tracking of CH2

Commands

from controller

to analog cell