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ATSAMD20-XPRO
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Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
19.8.3 Non-Maskable Interrupt Control
Name:
NMICTRL
Offset:
0x02
Reset:
0x00
Property:
Write-Protected
z
Bits 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 3 – NMIFILTEN: Non-Maskable Interrupt Filter Enable
0: NMI filter is disabled.
0: NMI filter is disabled.
1: NMI filter is enabled.
z
Bits 2:0 – NMISENSE: Non-Maskable Interrupt Sense
These bits define on which edge or level the NMI triggers.
These bits define on which edge or level the NMI triggers.
Bit
7
6
5
4
3
2
1
0
NMIFILTEN
NMISENSE[2:0]
Access
R
R
R
R
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Table 19-4. NMI Sense Configuration
NMISENSE
Name
Description
0x0
NONE
No detection
0x1
RISE
Rising-edge detection
0x2
FALL
Falling-edge detection
0x3
BOTH
Both-edges detection
0x4
HIGH
High-level detection
0x5
LOW
Low-level detection
0x6-0x7
-
Reserved