Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Hoja De Datos
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ATSAMD20-XPRO
384
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
25.8.8 Status
Name:
STATUS
Offset:
0x10
Reset:
0x0000
Property:
–
z
Bit 15 – SYNCBUSY: Synchronization Busy
This bit is cleared when the synchronization of registers between the clock domains is complete.
This bit is cleared when the synchronization of registers between the clock domains is complete.
This bit is set when the synchronization of registers between clock domains is in progress.
z
Bits 14:3 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 2 – BUFOVF: Buffer Overflow
Reading this bit before reading DATA will indicate the error status of the next character to be read.
Reading this bit before reading DATA will indicate the error status of the next character to be read.
This bit is cleared by writing a one to the bit or by disabling the receiver.
This bit is set when a buffer overflow condition is detected. An overflow condition occurs if the two-level receive
buffer is full when the last bit of the incoming character is shifted into the shift register. All characters shifted into
the shift registers before the overflow condition is eliminated by reading DATA will be lost.
buffer is full when the last bit of the incoming character is shifted into the shift register. All characters shifted into
the shift registers before the overflow condition is eliminated by reading DATA will be lost.
When set, the corresponding RxDATA will be 0.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear it.
z
Bits 1:0 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
Bit
15
14
13
12
11
10
9
8
SYNCBUSY
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
BUFOVF
Access
R
R
R
R
R
R/W
R
R
Reset
0
0
0
0
0
0
0
0