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ATSAMD20-XPRO
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Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
2 - When the SERCOM is in slave SPI mode, the BUFOVF flag is not
automatically cleared when CTRLB.RXEN is set to zero. Errata reference:
10563
automatically cleared when CTRLB.RXEN is set to zero. Errata reference:
10563
Fix/Workaround:
The BUFOVF flag must be manually cleared by software.
3 - The SERCOM SPI BUFOVF status bit is not set until the next character is
received after a buffer overflow, instead of directly after the overflow has
occurred. Furthermore the CTRLA.IBON bit will always be zero and cannot
be changed. Errata reference: 10551
received after a buffer overflow, instead of directly after the overflow has
occurred. Furthermore the CTRLA.IBON bit will always be zero and cannot
be changed. Errata reference: 10551
Fix/Workaround:
None.
35.2.10 ADC
1 - The automatic right shift of the result when accumulating/averaging ADC
samples does not work. Errata reference: 10530
samples does not work. Errata reference: 10530
Fix/Workaround:
To accumulate or average more than 16 samples, one must add the number of
automatic right shifts to AVGCTRL.ADJRES to perform the correct number of
right shifts. For example, for averaging 128 samples, AVGCTRL.ADJRES must
be written to 7 instead of 4, as the automatic right shift of 3 is not done. For
oversampling to 16 bits resolution, AVGCTRL.ADJRES must be written to 4
instead of 0 as the automatic right shift of 4 is not done.
automatic right shifts to AVGCTRL.ADJRES to perform the correct number of
right shifts. For example, for averaging 128 samples, AVGCTRL.ADJRES must
be written to 7 instead of 4, as the automatic right shift of 3 is not done. For
oversampling to 16 bits resolution, AVGCTRL.ADJRES must be written to 4
instead of 0 as the automatic right shift of 4 is not done.
The maximum number of right shifts that can be done using ADJRES is 7. This
means that when averaging more than 128 samples, the result will be more than
12 bits, and the additional right shifts to get the result down to 12 bits must be
done by firmware.
means that when averaging more than 128 samples, the result will be more than
12 bits, and the additional right shifts to get the result down to 12 bits must be
done by firmware.
35.2.11 Flash
1 - When cache read mode is set to deterministic (READMODE=2), setting
CACHEDIS=1 does not lead to 0 wait states on Flash access. Errata
reference: 10830
CACHEDIS=1 does not lead to 0 wait states on Flash access. Errata
reference: 10830
Fix/Workaround:
When disabling the cache (CTRLB.CACHEDIS=1), the user must also set
READMODE to 0 (CTRLB.READMODE=0).
READMODE to 0 (CTRLB.READMODE=0).
2 - When NVMCTRL issues either erase or write commands and the
NVMCTRL cache is not in LOW_POWER mode, CPU hardfault exception
may occur. Errata reference: 10804
NVMCTRL cache is not in LOW_POWER mode, CPU hardfault exception
may occur. Errata reference: 10804
Fix/Workaround:
Either:
- turn off cache before issuing flash commands by setting the NVMCTRL
CTRLB.CACHEDIS bit to one.
CTRLB.CACHEDIS bit to one.