Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Hoja De Datos
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ATSAMD20-XPRO
636
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
36.2
Rev. J – 12/2013
36.3
Rev. I – 12/2013
NVMCTRL - Non-
Volatile Memory
Controller
Volatile Memory
Controller
Cleaned up the
register.
General
Removed “Preliminary”
Description
z
Updated partially the Atmel SAM D20
Features
z
Power Consumption has been updated to “Down to 8µA running the Peripheral Touch
Controller”
Controller”
Configuration
Summary
Summary
Updated the
Ordering
Information
Information
Updated
z
Added AT prefix at the start of the ordering codes
Block Diagram
Updated the
z
Added the description of the connection between PORT and ARM CORTEX-M0+ CPU:
ARM SINGLE CYCLE IOBUS
ARM SINGLE CYCLE IOBUS
z
Renamed GENERIC CLOCK to GENERIC CLOCK CONTROLLER
I/O Multiplexing and
Considerations
Considerations
Updated the
z
Renamed all GCLK/IO[x] to GCLK_IO[x] in the
z
Updated the description of the
z
Added SWDIO to PA31 column G in the
and added a footnote
Product Mapping
Changed Peripheral to AHB-APB
Signal Description
Updated the
z
Removed GCLK from the heading “Generic Clock Generator”
z
Renamed IO[7:0] to GCLK_IO[7:0]
Memories
z
Added
z
Software Calibration Row changed to Software Calibration Area
z
Added
z
Updated the
z
Added the BOD33 and BOD12 default settings
z
Added
DFLL48M COARSE CAL and DFLL48M FINE CAL
z
Added table notes on rev C (Bit 40 and Bit 41) to the
Device Service Unit
z
z
Redefined DID register. FAMILY changed from 4 bits to 5 bits and SERIES from
8 bits to 6 bits
8 bits to 6 bits
z
register
z
Updated Family and Series bit registers
z
Updated
. Added ATSAMD20E18A device at 0xA.