Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Hoja De Datos

Atmel

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ATSAM4S-WPIR-RD

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

576

0x0070

Peripheral Select Register 1

PIO_ABCDSR1

Read/Write

0x00000000

0x0074

Peripheral Select Register 2

PIO_ABCDSR2

Read/Write

0x00000000

0x0078

to

0x007C

Reserved

–

–

–

0x0080

Input Filter Slow Clock Disable Register

PIO_IFSCDR

Write-only

–

0x0084

Input Filter Slow Clock Enable Register

PIO_IFSCER

Write-only

–

0x0088

Input Filter Slow Clock Status Register

PIO_IFSCSR

Read-only

0x00000000

0x008C

Slow Clock Divider Debouncing Register

PIO_SCDR

Read/Write

0x00000000

0x0090

Pad Pull-down Disable Register

PIO_PPDDR

Write-only

–

0x0094

Pad Pull-down Enable Register

PIO_PPDER

Write-only

–

0x0098

Pad Pull-down Status Register

PIO_PPDSR

Read-only

0x009C

Reserved –

–

–

0x00A0

Output Write Enable

PIO_OWER

Write-only

–

0x00A4

Output Write Disable

PIO_OWDR

Write-only

–

0x00A8

Output Write Status Register

PIO_OWSR

Read-only

0x00000000

0x00AC

Reserved

–

–

–

0x00B0

Additional Interrupt Modes Enable Register

PIO_AIMER

Write-only

–

0x00B4

Additional Interrupt Modes Disable Register

PIO_AIMDR

Write-only

–

0x00B8

Additional Interrupt Modes Mask Register

PIO_AIMMR

Read-only

0x00000000

0x00BC

Reserved

–

–

–

0x00C0

Edge Select Register

PIO_ESR

Write-only

–

0x00C4

Level Select Register

PIO_LSR

Write-only

–

0x00C8

Edge/Level Status Register

PIO_ELSR

Read-only

0x00000000

0x00CC

Reserved

–

–

–

0x00D0

Falling Edge/Low-Level Select Register

PIO_FELLSR

Write-only

–

0x00D4

Rising Edge/ High-Level Select Register

PIO_REHLSR

Write-only

–

0x00D8

Fall/Rise - Low/High Status Register

PIO_FRLHSR

Read-only

0x00000000

0x00DC

Reserved

–

–

–

0x00E0

Lock Status

PIO_LOCKSR

Read-only

0x00000000

0x00E4

Write Protection Mode Register

PIO_WPMR

Read/Write

0x0

0x00E8

Write Protection Status Register

PIO_WPSR

Read-only

0x0

0x00EC

to

0x00F8

Reserved

–

–

–

0x0100

Schmitt Trigger Register

PIO_SCHMITT

Read/Write

0x00000000

0x0104-

0x010C

Reserved

–

–

–

0x0110

Reserved

–

–

–

0x0114-

0x011C

Reserved

–

–

–

Table 31-3.

Register Mapping (Continued)

Offset

Register

Name

Access

Reset