Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Hoja De Datos

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ATSAM4S-WPIR-RD
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SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
• FSOS: Transmit Frame Sync Output Selection
• FSDEN: Frame Sync Data Enable
0 = The TD line is driven with the default value during the Transmit Frame Sync signal.
1 = SSC_TSHR value is shifted out during the transmission of the Transmit Frame Sync signal.
• FSEDGE: Frame Sync Edge Detection
Determines which edge on frame sync will generate the interrupt TXSYN (Status Register).
• FSLEN_EXT: FSLEN Field Extension
Extends FSLEN field. For details, refer to FSLEN bit description on page 644.
Value
Name
Description
0
NONE
None, RF pin is an input
1
NEGATIVE
Negative Pulse, RF pin is an output
2
POSITIVE
Positive Pulse, RF pin is an output
3
LOW
Driven Low during data transfer
4
HIGH
Driven High during data transfer
5
TOGGLING
Toggling at each start of data transfer
Value
Name
Description
0
POSITIVE
Positive Edge Detection
1
NEGATIVE
Negative Edge Detection