Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Hoja De Datos
Los códigos de productos
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
856
• CPCDIS: Counter Clock Disable with RC Compare
0: Counter clock is not disabled when counter reaches RC.
1: Counter clock is disabled when counter reaches RC.
1: Counter clock is disabled when counter reaches RC.
• EEVTEDG: External Event Edge Selection
• EEVT: External Event Selection
Signal selected as external event.
Note:
1. If TIOB is chosen as the external event signal, it is configured as an input and no longer generates waveforms and
subsequently no IRQs
.
• ENETRG: External Event Trigger Enable
0: The external event has no effect on the counter and its clock.
1: The external event resets the counter and starts the counter clock.
1: The external event resets the counter and starts the counter clock.
Note: Whatever the value programmed in ENETRG, the selected external event only controls the TIOA output and TIOB if not used as
input (trigger event input or other input used).
• WAVSEL: Waveform Selection
• WAVE: Waveform Mode
0: Waveform Mode is disabled (Capture Mode is enabled).
1: Waveform Mode is enabled.
1: Waveform Mode is enabled.
Value
Name
Description
0
NONE
None
1
RISING
Rising edge
2
FALLING
Falling edge
3
EDGE
Each edge
Value
Name
Description
TIOB Direction
0
TIOB
TIOB
Input
1
XC0
XC0
Output
2
XC1
XC1
Output
3
XC2
XC2
Output
Value
Name
Description
0
UP
UP mode without automatic trigger on RC Compare
1
UPDOWN
UPDOWN mode without automatic trigger on RC Compare
2
UP_RC
UP mode with automatic trigger on RC Compare
3
UPDOWN_RC
UPDOWN mode with automatic trigger on RC Compare