Linear Technology LTM8052A Demo Board, 36Vin, 5A 2-Quadrant CVCC Step-Down µModule regulator w/o OVP DC1939A DC1939A Hoja De Datos
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DC1939A
LTM8052/LTM8052A
10
8052fc
Typical perForMance characTerisTics
T
A
= 25°C, unless otherwise noted.
CTL_I Voltage vs Maximum
Output Current, CTL_T = 2V
CTL_T Voltage vs Maximum
Output Current, CTL_I = 2V
CTL_I VOLTAGE (V)
0
6
4
2
0
–2
–4
–6
–8
0.75
1.25
8052 G54
0.25
0.5
1
1.5
MAXIMUM CURRENT (A)
CTL_T VOLTAGE (V)
0
6
4
2
0
–2
–4
–6
–8
0.75
1.25
8052 G55
0.25
0.5
1
1.5
MAXIMUM CURRENT (A)
pin FuncTions
V
OUT
(Bank 1): Power Output Pins. Apply the output filter
capacitor and the output load between these pins and
GND pins. When reverse current is being driven into the
LTM8052/LTM8052A’s output by the load, the energy is
delivered back through the LTM8052/LTM8052A and out
to the V
IN
pins. Care must be taken to prevent excessive
voltage if other devices on the V
IN
bus cannot absorb this
energy. See Input Precautions in the Applications Infor-
mation section for more details and circuit suggestions.
GND (Bank 2): Tie these GND pins to a local ground plane
GND (Bank 2): Tie these GND pins to a local ground plane
below the LTM8052/LTM8052A and the circuit compo-
nents. In most applications, the bulk of the heat flow out
of the LTM8052/LTM8052A is through these pads, so the
printed circuit design has a large impact on the thermal
performance of the part. See the PCB Layout and Ther-
mal Considerations sections for more details. Return the
feedback divider (R
ADJ
) to this net.
V
IN
(Bank 3): The V
IN
pins supply current to the LTM8052/
LTM8052A’s internal regulator and to the internal power
switches. This pin must be locally bypassed with an ex-
ternal, low ESR capacitor; see Table 1 for recommended
values.
CTL_T (Pin D8): Connect a resistor/NTC thermistor network
CTL_T (Pin D8): Connect a resistor/NTC thermistor network
to the CTL_T pin to reduce the maximum regulated output
current of the LTM8052/LTM8052A in response to tem-
perature. The maximum control voltage is 1.5V. If this
function is not used, tie this pin to V
REF
.
CTL_I (Pin E8): The CTL_I pin reduces the maximum
regulated output current of the LTM8052/LTM8052A. The
maximum control voltage is 1.5V. If this function is not
used, tie this pin to V
REF
.
V
REF
(Pin F8): Buffered 2V Reference Capable of 0.5mA
Drive. It is valid when V
IN
> 6V and RUN is active high.
RT (Pin G8): The RT pin is used to program the switching
frequency of the LTM8052/LTM8052A by connecting a re-
sistor from this pin to ground. The Applications Information
section of the data sheet includes a table to determine the
resistance value based on the desired switching frequency.
When using the SYNC function, apply a resistor value
equivalent to 20% lower than the clock frequency applied
to the SYNC pin. Do not leave this pin open.
COMP (Pin H8): Compensation Pin. This pin is generally
COMP (Pin H8): Compensation Pin. This pin is generally
not used. The LTM8052/LTM8052A is internally compen-
sated, but some rare situations may arise that require a
modification to the control loop. This pin connects directly
to the input PWM comparator of the LTM8052/LTM8052A.
In most cases, no adjustment is necessary. If this function
is not used, leave this pin open.