STMicroelectronics Fully integrated stepper motor driver mounting the L6472 in a high power PowerSO package EVAL6472PD EVAL6472PD Hoja De Datos

38/70

DocID022729 Rev 3

The integrated 8-bit serial peripheral interface (SPI) is used for a synchronous serial 
communication between the host microprocessor (always master) and the L6472 (always 
slave).

The SPI uses chip select (CS), serial clock (CK), serial data input (SDI) and serial data 
output (SDO) pins. When CS is high, the device is unselected and the SDO line is inactive 
(high-impedance).

The communication starts when CS is forced low. The CK line is used for synchronization of 
data communication.

All commands and data bytes are shifted into the device through the SDI input, most 
significant bit first. The SDI is sampled on the rising edges of the CK.

All output data bytes are shifted out of the device through the SDO output, most significant 
bit first. The SDO is latched on the falling edges of the CK. When a return value from the 
device is not available, an all zero byte is sent.

After each byte transmission, the CS input must be raised and be kept high for at least t

disCS

 

in order to allow the device to decode the received command and put the return value into 
the shift register.

All timing requirements are shown in 

 (see 

 for the respective 

electrical characteristics for values).

Multiple devices can be connected in a daisy chain configuration, as shown in