STMicroelectronics Demonstration board using a dual full-bridge L6227Q EVAL6227QR EVAL6227QR Hoja De Datos
Los códigos de productos
EVAL6227QR
L6227Q
Circuit description
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Figure 12.
Area where t
ON
can vary maintaining the PWM regulation
4.5 Slow
decay
mode
time, the lower power MOS is switched off and the current recirculates around the upper half
of the bridge. Since the voltage across the coil is low, the current decays slowly. After the
dead time the upper power MOS is operated in the synchronous rectification mode. When
the monostable times out, the lower power MOS is turned on again after some delay set by
the dead time to prevent cross conduction.
of the bridge. Since the voltage across the coil is low, the current decays slowly. After the
dead time the upper power MOS is operated in the synchronous rectification mode. When
the monostable times out, the lower power MOS is turned on again after some delay set by
the dead time to prevent cross conduction.
Figure 13.
Slow decay mode output stage configurations
0.1
1
10
100
1
10
100
Coff [nF]
to
n(
mi
n)
[µ
s]
1.5
µs (typ. value)