Intel S5500WBR Manual De Usuario
Functional Architecture
Intel® Server Board S5500WB TPS
16
Revision 1.9
Intel order number E53971-008
Table 4. Mixed Processor Configurations
Error
Severity
System Action
Processor family not
identical
identical
Fatal
The BIOS detects the error condition and responds as follows:
Logs the error into the system event log (SEL).
Alerts the Integrated BMC of the configuration error with an
IPMI command.
IPMI command.
Does not disable the processor.
Displays ―0194: Processor family mismatch detected‖
message in the error manager.
message in the error manager.
Halts the system.
Processor cache not
identical
identical
Fatal
The BIOS detects the error condition and responds as follows:
Logs the error into the SEL.
Alerts the Integrated BMC of the configuration error with an
IPMI command.
IPMI command.
Does not disable the processor.
Displays ―0192: Cache size mismatch detected‖ message
in the error manager.
in the error manager.
Halts the system.
Processor frequency (speed)
not identical
not identical
Major
The BIOS detects the error condition and responds as follows:
Adjusts all processor frequencies to the lowest common
denominator.
denominator.
Continues to boot the system successfully.
If the frequencies for all processors cannot be adjusted to be the
same, then the BIOS:
Logs the error into the SEL.
Displays ―0197: Processor speeds mismatched‖ message
in the error manager.
in the error manager.
Halts the system.
Processor microcode
missing
missing
Minor
The BIOS detects the error condition and responds as follows:
Logs the error into the SEL.
Does not disable the processor.
Displays ―816x: Processor 0x unable to apply microcode
update‖ message in the error manager.
update‖ message in the error manager.
The system continues to boot in a degraded state,
regardless of the setting of POST Error Pause in the
Setup.
regardless of the setting of POST Error Pause in the
Setup.
Processor Intel
®
QuickPath
Interconnect speeds not
identical
identical
Halt
The BIOS detects the error condition and responds as follows:
Adjusts all processor interconnect frequencies to lowest
common denominator.
common denominator.
Logs the error into the SEL.
Alerts the Integrated BMC about the configuration error.
Does not disable the processor.
Displays ―0195: Processor 0x Intel(R) QPI speed
mismat
mismat
ch‖ message in the Error Manager.
If POST Error Pause is disabled in the Setup, continues to
boot in a degraded state.
boot in a degraded state.
If POST Error Pause is enabled in the Setup, pauses the
system, but can continue to boot if operator directs.
system, but can continue to boot if operator directs.