Intel 1.40 GHz RH80532NC017256 Hoja De Datos
Los códigos de productos
RH80532NC017256
Mobile Intel
®
Celeron
®
Processor (0.13 µ) in
Micro-FCBGA and Micro-FCPGA Packages Datasheet
24 Datasheet
298517-006
Figure 3. VTTPWRGD System-Level Connections
Voltage Regulator
Processor
Clock Generator
Vcct
Vttpwrgd
(output)
Vttpwrgd
(input)
(input)
Vttpwrgd#
(input)
(input)
Vcct
10k
Vcct
3.3V
100k
1.2V to 3.3V Level Shifter
1k
3.2.4 VTTPWRGD
Signal Quality Specification
The VTTPWRGD signal is an input to the processor used to determine that the VTT power is stable and
the VID and BSEL signals should be driven to their final state by the processor. To ensure the processor
correctly reads this signal, it must meet the following requirement while the signal is in its transition
region of 300 mV to 900 mV. Also, VTTPWRGD should only enter the transition region once, after
VTT is at nominal values, for the assertion of the signal.
the VID and BSEL signals should be driven to their final state by the processor. To ensure the processor
correctly reads this signal, it must meet the following requirement while the signal is in its transition
region of 300 mV to 900 mV. Also, VTTPWRGD should only enter the transition region once, after
VTT is at nominal values, for the assertion of the signal.
Table 8. VTTPWRGD Noise Specification
Parameter Specification
Amount of noise (glitch)
Less than 100 mV
In addition, the VTTPWRGD signal should have reasonable transition time through the transition region.
A sharp edge on the signal transition will minimize the chance of noise causing a glitch on this signal.
Intel recommends the following transition time for the VTTPWRGD signal.
A sharp edge on the signal transition will minimize the chance of noise causing a glitch on this signal.
Intel recommends the following transition time for the VTTPWRGD signal.
Table 9. VTTPWRGD Transition Time Specification
Parameter Recommendation
Transition time (300 mV to 900 mV)
Less than or equal to 100 µs
3.2.4.1 Transition
Region
The transition region covered by this requirement is 300 mV to 900 mV. Once the VTTPWRGD signal
is in that voltage range, the processor is more sensitive to noise, which may be present on the signal.
The transition region when the signal first crosses the 300 mV voltage level and continues until the last
time it is below 900 mV.
is in that voltage range, the processor is more sensitive to noise, which may be present on the signal.
The transition region when the signal first crosses the 300 mV voltage level and continues until the last
time it is below 900 mV.
3.2.4.2 Transition
Time
The transition time is defined as the time the signal takes to move through the transition region. A
100-µs transition time will ensure that the processor receives a good transition edge.
100-µs transition time will ensure that the processor receives a good transition edge.