Intel E3815 FH8065301567411 Hoja De Datos
Los códigos de productos
FH8065301567411
PCU – Serial Peripheral Interface (SPI)
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4367
•
Trusted Execution Engine
•
Secure Boot
•
Soft Straps
•
Two SPI Flash device support
•
Hardware sequencing access
•
Descriptor-based security access restrictions
Note:
When operating in Non-Descriptor mode, software sequencing must be used to access
the Flash.
the Flash.
Note:
When operating in Non-Descriptor Mode, and a SPI Flash is attached to the SoC, it is
required that the Flash Valid Signature, at offset 10h of the Flash Descriptor, does not
equal the expected valid value (0FF0A55Ah) or the SPI Controller will wrongly interpret
that it has a valid signature and that a Flash Descriptor has been implemented.
required that the Flash Valid Signature, at offset 10h of the Flash Descriptor, does not
equal the expected valid value (0FF0A55Ah) or the SPI Controller will wrongly interpret
that it has a valid signature and that a Flash Descriptor has been implemented.
31.2.2
Descriptor Mode
Descriptor Mode is required to enable many features of the SoC:
•
Trusted Execution Engine
•
Secure Boot
•
PCI Express* root port configuration
•
Supports for two SPI components using two separate chip select pins
•
Hardware enforced security restricting master accesses to different regions
•
Soft Strap region providing the ability to use Flash NVM to remove the need for
pull-up/pull-down resistors for strapping SoC features
pull-up/pull-down resistors for strapping SoC features
•
Support for the SPI Fast Read instruction and frequencies greater than 20 MHz
•
Support for Single Input, Dual Output Fast reads
•
Use of standardized Flash instruction set
SPI Flash Regions
In Descriptor Mode the Flash is divided into five separate regions:
Table 297. SPI Flash Regions
Region
Content
0
Flash Descriptor
1
BIOS
2
Trusted Execution Engine
3
Reserved
4
Platform Data